ABB PFEA111-20 3BSE050090R20

Description

ABB PFEA111-20 3BSE050090R20

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PFEA111-20 3BSE050090R20 is established based on the design requirements and indicators analysis of the embedded control system for charging piles mentioned above. The modular design of the system is carried out, and the ST ultra-low power ARM Cortex-TM-M0 microcontroller is used as the main controller of the control system. The software design of this system is based on the Linux2632 core platform, and 8-bit and 16 bit microcontrollers are used for the software development of a rechargeable human control system, which can achieve advanced and complex functions of intelligent charging piles on economical user end products. The development of embedded software systems usually uses a cross compilation environment, where the development environment is installed on a desktop or server computer system, and the developed system runs on embedded computers of other architectures. Assuming chanVector is the list of acquisition channels and Fs is the sampling frequency, program loading is performed from the external program memory 0FF80H, and program loading mode is executed from the on-chip ROM’s OFF8H. The target board of the embedded control system for charging stations is connected to the host computer using a 232 port Ethernet USB cable, and the hardware connection is based on the STM32 intelligent charging control system development environment.

PFEA111-20 3BSE050090R20 uses Linux system as an embedded operating system to install Cygwin system in Windows system. The compiled files are transferred to the Windows system, and the intelligent charging human control application “simulates” the binary code compiled by various compilers used in a standard PC environment in Linux to achieve GCC compilation. The AD acquisition module of the rechargeable human control system consists of two parts: the signal conditioning part and the acquisition chip part. The data storage of the AD module includes two 32 KB SRAM banks. The AD acquisition chip is responsible for collecting analog signals of embedded control information of intelligent charging piles, converting them into digital signals, and transmitting them to the main control system for subsequent digital processing. The main control system is the core of the entire intelligent charging pile embedded control system, designed using the STM32 embedded design method. It constructs a 4-channel joint cache in the user control panel and uses 8 32-bit timers/counters for intelligent charging of electric vehicles. Based on the above established embedded STM32 development environment, carry out modular design of the system.

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